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Session 5C

Wednesday 3/22/00

3:25pm-5:35pm

 

VDSM Capacitive & Inductive Coupling Issues

 

Co-Chairs: Tak Young, Synopsys, Eileen Hong You, Sun Microsystems

 

3:25pm

Introduction

3:30pm

5C.1 Coupling Noise Analysis for VLIS and ULSI Circuits

Kathirgamar Aingaran, Fabian Klass, Chin-Man Kim, Chaim Amir, Joydeep Mitra, Eileen You, Jamil Mohd and Sai-Keung Dong, Sun Microsystems Inc., Palo Alto, CA

3:55pm

5C.2 Efficient Delay Calculation in Presence of Crosstalk

Tong Xiao, Malgorzata Marek-Sakowska, University of Santa Barbara, CA

4:20pm

5C.3 Crosstalk Aware Static Timing Analysis: A Two Step Approach

Bruno Franzini, Cristiano Forzan, Davide Pandini, Primo Scandolara Alessandro Dal Fabbro, STMicroelectronics, Agrate Brianza, Italy

4:45pm

5C.4 Deep Sub-Micron Static Timing Analysis in the Presence of CrossTalk

Peivand F Tehrani, Shang Chyou, Uma Ekambaram, Synopsys, Thousand Oaks, CA

5:10pm

5C.5 Quick On-Chip Self- and Mutual-Inductance Screen

Shen Lin, Norman Chang, Sam Nakagawa, HP, Palo Alto, CA


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Revised: May 13, 2001 .