Session 4C

10:30am - 12:00pm

 

Techniques for High Speed Circuits and Module Generation

 

Co-Chairs

James Lei, Altera Corporation

Andrew Kahng, University of California, San Diego

 

10:30am          

Introduction     

 

10:35am          

4C-1            Parameterized Macrocells with Accurate Delay Models for Core-Based Designs, Makram Mansour, Mohammad Mansour, Amit Mehrotra, University of Illinois at Urbana-Champaign, Urbana, IL      

 

11:05am          

4C-2            Procedural Analog Design (PAD) Tool, Danica Stefanovic, Maher Kayal, Marc Pastre, Vanco Litovski1, Swiss Federal Institute of Technology, Lausanne, Switzerland and 1University of Nis, Nis, Yugoslavia       

 

11:35am          

4C-3    A Novel Clocking Strategy for Dynamic Circuits, Young Jun Lee, Yong-Bin Kim, Northeastern University, Boston, MA  

 


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