Session 1C

10:30am - 12:00pm

Poster session

Co-Chairs

Adrian Ionescu, EPFL
Siva Narendra, Intel

10:30am          

Introduction

1C-1    Transient Analysis of On-Chip Power Distribution Networks Using Equivalent Circuit Modeling
Zhu Pan, Yici Cai, Sheldon X.-D. Tan, Zuying Luo, Xianlong Hong  

1C-2    Leveraging Delay Slack in Flip Flop and Buffer Insertion for Power Reduction
Lucanus Simonson, King Ho Tam, Lei He, Mosur Mohan

1C-3    Moment Computations of Nonuniform Distributed Coupled RLC Trees with Applications to Estimating Crosstalk Noise
Herng-Jer Lee, Chia-Chi Chu, and Wu-Shiung Feng

1C-4    New Test Access for High Resolution SD ADC's for Noise Transfer Function Evaluation
Daniela De Venuto

1C-5    Design for Testability of FPGA Blocks
Stuart McCracken, Zeljko Zilic

1C-6    New challenges emerging on the design of VLSI circuits made of MOSFETs using new gate dielectric materials
N. Konofaos , G. Ph. Alexiou

1C-7    Simultaneous Multiple-Vdd scheduling and Allocation for partitioned floorplan
Dongku Kang, Mark C. Johnson, and Kaushik Roy

1C-8    Node Voltage Dependent Subthreshold Leakage Current Characteristics of Dynamic Circuits
Volkan Kursun, and Eby G. Friedman

1C-9    Automated Formal Verification of Scheduling Process using Finite State Machines with Datapath(FSMD)
Youngsik Kim, Nazanin Mansouri

1C-10    Transistor Level Budgeting for Power Optimization
Eren Kursun, Soheil Ghiasi, Majid Sarrafzadeh

1C-11    Resistance Matrix in Crosstalk Modeling for Multiconductor Systems
Sunil Yu, Dusan M. Petranovic, Shoba Krishnan, Kwyro Lee, Cary Y. Yang

1C-12    Low Power 260k Color TFT LCD One-chip Diver IC
Bo-sung Kim, Won-Hyo Lee, Young-gi Kim, Kyoung-Won Park, Soon-Yang Hong

1C-13    Analysis and Reduction of On-Chip Inductance Effects in Power Supply Grids
Woo Hyung Lee, Sanjay Pant, David Blaauw

1C-14    A Variable Reduction Technique for the Analysis of Ultra Large-Scale Power Distribution Networks
Jong-Eun Koo, Kyung-Ho Lee, Young-Hoe Cheon, Joon-Ho Choi, Moon-Hyun Yoo, Jeong-Taek Kong

1C-15    Rewiring forWatermarking Digital Circuits
M. Moiz Khan, Spyros Tragoudas