Given the manufacturing challenges associated with nanotube-based interconnect solutions, determining the impact of process variations on this new technology relative to standard copper interconnect is vital. In this paper, we investigate the impact of process variations on future interconnect solutions based on bundles of single-walled carbon nanotubes (SWCNT). Leveraging an equivalent RLC model for SWCNT bundle interconnect, we calculate the relative impact of ten potential sources of variation in nanotube bundle interconnect on resistance, capacitance, inductance, and delay. We compare the relative impact of variation for SWCNT bundles and standard copper wires as process technology scales and find that nanotube bundle interconnect will have up to a 40% increase in overall 3-sigma variation in delay. To achieve the same percentage variation in both SWCNT bundles and copper interconnect, the percentage variation in bundle dimensions must be reduced by at least 63% in 22 nm process technology. Therefore, future SWCNT interconnect fabrication solutions must effectively control process parameters in order to realize reliable integrated circuits for future VLSI applications.