Increasing variability not only affects the behavior of contemporary ICs but also their vulnerability to transient error phenomenon especially radiation induced soft errors. Such variations in device parameters are caused by static process variations, dynamic variations in power supply and temperature and slow degradation of individual devices due to phenomena like Hot Carrier Injection (HCI) and Negative Bias Temperature Instability (NBTI). In this paper, we analyze the impact of such variations on the Soft Error Rates (SER) of combinational logic circuits. Other contributions of this work also include tools that model threshold degradation of NMOS due to HCI and PMOS due to NBTI in logic circuits. Results were obtained for custom designed circuits and ISCAS-85 benchmarks. A detailed analysis of effect of threshold variations on SER is also presented with interesting observations.