Technology scaling leads to the decrease in feature sizes, operating voltages and design margins, thus posing new challenges, among which radiation-induced soft errors are considered to be a major concern. Furthermore, with the reduction in critical charge and the distances between device junctions, the occurrence rate of multiple transients resulting from a single hit is increasing. In this work, we consider the effect of these multiple-event transients on the outputs of logic circuits. Our framework allows for the analysis of soft errors in logic circuits, including several aspects: estimation of the effect of both single and multiple transient faults on both combinational and sequential circuits, analysis of the impact of multiple flip-flop upsets in sequential circuits, and analysis of transient behavior of the soft error rate in the cycles following the hit. Although in this paper we focus mostly on soft errors, the proposed framework can be used to estimate the impact of transient faults stemming not only from radiation, but also other physical phenomena. The results obtained using the proposed framework show that output error rates, resulting from multiple-event transients or multiple-bit upsets, can vary across different circuits by several orders of magnitude.