A Dual-Level Adaptive Supply Voltage System for Variation Resilience

Kyu-Nam Shim,  Jiang Hu,  Jose Silva-Martinez
Department of ECE, Texas A&M University, College Station, TX 77843


VLSI circuits of 45nm technology and beyond are increasingly affected by process variations as well as aging effects. Overcoming the variations inevitably requires additional power expense which in turn aggravates the power and heat problem. Adaptive supply voltage (ASV) is an arguably power-efficient approach for variation resilience since it attempts to allocate power resources only to where the negative effect of variations is strong. We propose a dual-level ASV system for designs containing many timing critical paths. This system can simultaneously provide adaptive supply voltage at both coarse-grained and fine-grained level, and has limited power routing overhead. The dual-ASV system is compared with conventional ASV through SPICE simulations on benchmark circuits. The results indicate that the dual-ASV system consumes significantly less power and achieves similar performance in presence of variations.