Stream architecture is emerging as an important architecture for performance improvement of media applications. With technology scaled to nanometer-scale, leakage energy consumption is accounting for a greater proportion of the total energy consumption than ever, especially for stream architectures with a large number of functional units. In this paper, a compiler-assisted instruction-level scheduling algorithm is proposed to optimize leakage energy by idle interval distribution for stream architectures. The algorithm explores the scheduling spaces of idle intervals spatially and temporally and gathers the idle intervals for power-gating. The leakage energy is optimized without performance loss by increasing efficient power-gated cycles and decreasing switch times. We implement the proposed scheduling algorithm on Imagine processor and employ a set of benchmarks to evaluate the effectiveness of the algorithm. Experimental results show that the leakage energy consumption is reduced by 52% averagely compared with the list scheduling algorithm.