In this paper, we introduce PETS, a simulation based tool to estimate, analyse and optimize power and energy consumption of an application running on complex state-of-the-art heterogeneous embedded processor based platforms. This tool is integrated with power and energy models in order to support comprehensive design space exploration for low power multi-core and heterogeneous multiprocessor platforms such as OMAP, CARMA, Zynq 7000 and Virtex II Pro. Moreover, PETS is equipped with power optimization techniques such as dynamic slack reduction and work load balancing. The development of PETS involves two steps. First step: power model generation. For the power model development, we used functional parameter to set up generic power models for the different parts of the system. So far, seven power models have been developed for different architectures, starting from the simple low power architecture ARM9 to the very complex DSP TI C64x. Second step: a simulation based virtual platform framework is developed using SystemC IP's and JIT/ISS compilers to accurately evaluate the activities used in the related power models. The combination of the above two steps leads to a novel power estimation methodology, which gives a good trade-off between accuracy and speed.
The accuracy of our proposed tool is evaluated by using a variety of industrial benchmarks. Estimated power and energy values are compared to real board measurements. Our obtained power estimation results provide less than 4% of error for single core processor, 4.6% for dual-core processor, 5% for quad-core, 6.8% multi-processor based system, effective optimization of power/energy for the applications and 200% faster compared to the state-of-the-art power estimation tools.