We present an overview of several techniques that are used when the layout pitch and feature size become significantly smaller than the minimum resolution of the lithographic process. These technologies, known collectively as multi-patterning (MP) share the common approach: a single layer is decomposed into two or more masks and printed in multiple stages. However, a great variety of approaches exists when it comes to details. There are several different ways to combine multiple masks into one final layer, each with its own advantages and draw-backs. The choice of multi-patterning technology is closely connected with the process technology, of course, but it turns out to have major implications on the entire IC design flow. We will review the major types of multi-patterning technologies, their impact on the lithographic process, yield, and design flow, and the requirements they impose on designers and on the EDA tools.