Adder Implementation in Reconfigurable Resistive Switching Crossbar

Pravin Mane, Sudeep Mishra, Ravish Deliwala, Ramesha C. K.
BITS Pilani K K Birla Goa Campus


Memristors are being investigated by researchers as a replacement for the present non-volatile memory architectures and logical operation units. Such a shift to memristor based devices will allow for the development of computer architectures which are highly advanced than the classical von Neumann architecture. In this paper, we have proposed an N-input stateful-NOR operation on Complementary Resistive Switches (CRS) based crossbar array. The logic is implemented on nanocrossbar arrays where connection and control is provided by underlying CMOS layer. A study of reconfigurable logic using stateful-NOR gate on CRS based crosssbar array and an implementation of 1-bit adder has been presented which has then been extended for N-bit adder. A comparison of 8-bit adder implementation with existing adder architectures on crossbar shows reduction in the number of execution steps required and number of CRS cells used for implementation.