Resistive Random-Access-Memory (ReRAM) crossbar is a promising memory architecture that drawn great research attention as main memory and computing Marco in the Processing-in-Memory (PIM) system. However, its productization is not only hampered by the immature fabrication process but also the various non-ideal effects of ReRAM device, including programming variation, read disturbance, stuck-at-fault and etc. In this work, we investigate the cross-layer design strategies to mitigate those non-ideal effects. In the first part, we introduce the circuit-level design of a self-terminated writing module for precisely and rapidly programming the ReRAM arrays, thus addressing the programming variation and read disturbance issue. In the second part, taken the Deep Neural Network (DNN) acceleration as the target application of ReRAM PIM system, we focuses on leveraging the DNN binarization technique to enhance the fault-tolerance capability against stuck-at-fault device defect. However, the main issue of binarized DNN is it normally encounters great accuracy drop compared to its full-precision counterpart. As the countermeasure, we introduce a framework called HAWIS to search the optimal network architecture configuration via reinforcement learning. Such framework can achieve the accuracy close to the given full-precision DNN, while minimize the hardware cost (memory footprint, energy, etc.).