Session 2A

1:00pm - 3:05pm


Testing of SoCs



Sreejet Chakravarty, Intel Corporation

Jacob Abraham, University of Texas






2A-1    Solving the SoC Test Scheduling Problem Using Network Flow and Reconfigurable Wrappers, Sandeep Koranne, Tanner Research Inc., Pasadena, CA 



2A-2    Static Pin Mapping and SOC Test Scheduling for CORES with Multiple Test Sets, Yu Huang, Wu-Tung Cheng, Chien-Chung Tsai, Nilanjan Mukherjee, Sudhakar Reddy1, Mentor Graphics Corp., Waltham, MA and Wilsonville, OR, 1University of Iowa, Iowa City, IA           



2A-3            Compact Dictionaries for Fault Diagnosis in BIST, Chunsheng Liu, Krishnendu Chakrabarty, Duke University, Durham, NC   



2A-4            Automated Synthesis of Configurable Two-Dimensional Linear Feedback Shifter Registers for Random/Embedded Test Patterns, Chien-In Henry Chen, Wright State University, Dayton, OH


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