Session 3C

3:30pm - 5:35pm

Substrate noise: Analysis and prevention

  Co-Chairs

Howard Chen, IBM
Charlie Chung-Ping Chen, NTU

3:30pm

Introduction  

3:35pm

3C-1            TBD, Invited
Tbd

4:05pm

3C-2            An Overview of Substrate Noise Reduction Techniques
Shahab Ardalan, Manoj Sachdev

4:35pm

3C-3            

Supply and Substrate Noise Tolerance Using Dynamic Tracking Clusters in Configurable Memory Designs
Meng-Fan Chang, Ding-Ming Kwai, Kuei-Ann Wen

5:05pm

3C-4    Modeling of Wave Behavior of Substrate Noise Coupling for Mixed-Signal IC Design
Georgios Veronis, Yi-Chang Lu, and Robert W. Dutton

5:20pm

3C-5    Estimating Phase-Locked Loop Jitter due to Substrate Coupling: A Cyclostationary Approach
Henry H.Y. Chan, Zeljko Zilic