A High Performance, Scalable Multiplexed Keeper Technique

Jaydeep Kulkarni and Kaushik Roy
Purdue University


This paper presents a new technique to improve performance of wide dynamic circuits by efficiently using the conditional keeper. PMOS transistor which is used to charge the dynamic node in the precharge phase is also used as a conditional keeper in the evaluation phase. The keeper functionality is merged in precharge PMOS. It is found that at same DC noise robustness; this technique gives 9% improvement in delay, 14% improvement in power and 18% improvement in clock load compared to conditional keeper technique. This technique shows zero delay penalty at higher noise immunity compared to conventional dynamic circuits. Also, this technique can be used as a burn-in tolerant keeper by adding a ‘Burn-In’ control signal to the multiplexed keeper without adding extra load at the dynamic node. For scaled technologies, proposed technique predicts consistent improvement in DC noise robustness compared to conventional dynamic circuits.