Modeling of PMOS NBTI Effect Considering Temperature Variation

Hong Luo1,  Yu Wang1,  Ku He1,  Rong Luo1,  Huazhong Yang1,  Yuan Xie2
1Tsinghua University, 2Pennsylvania State University


Negative bias temperature instability (NBTI) has come to the forefront of critical reliability phenomena in advanced CMOS technology. In this paper, we propose a fast and accurate PMOS NBTI model, in which the temperature variation and the ratio of active to standby time are considered in both stress and relaxation phases. A PMOS Vth degradation model and a digital circuits’ temporal performance degradation estimation method are developed based on our PMOS NBTI model. The simulation results show that: 1) our dynamic NBTI model without temperature variation is as accurate as previous models, the error is less than 2.3%; 2) the analysis error of PMOS Vth degradation may reach up to 52.6% without considering temperature variation; 3) for ISCAS85 benchmark circuits, the error of worst case performance degradation analysis is about on average 52.0%; 4) the ratio of active to standby time has a considerable impact during the performance degradation analysis.