Increasing Manufacturing Yield for Wideband RF CMOS LNAs in the Presence of Process Variations

Arthur Nieuwoudt,  Tamer Ragheb,  Hamid Najati,  Yehia Massoud
Rice University


In this paper, we develop several design techniques for reducing the impact of manufacturing variations on integrated wideband low noise amplifiers (LNA). Utilizing an efficient modeling and automated design methodology, we investigate the sensitivity of LNA performance metrics to process variations and determine that the input impedance matching is particularly sensitive to perturbations in component values. Based on the sensitivity analysis, we employ two numerical techniques to increase the reliability of LNA designs. To further mitigate the impact of process variations on the input impedance matching, we add additional circuit elements and tunable capacitors to dynamically compensate for manufacturing variations after fabrication. The results indicate that the proposed design techniques can increase manufacturing yield by up to one order of magnitude for input impedance matching with only a 14% increase in noise figure.