Session 1A

ISQED08 Embedded Tutorial

Tuesday March 18, 2008


Room: San Jose


SOC verification



Pallab Chatterjee

Silicon Map



The complexity of current SOCs requires extensive engineering manpower and schedule allocation if feasibility and verification is left to the end of the program cycle. This tutorial will address several methods of early design phase verification and the resulting tradeoffs in the design and verification flow.



Managing early design feasibility issues through system physical prototyping



Koko Mihan

Javelin Design Automation



Innovations in Functional Verification Technology



Kenneth Larsen

Mentor Graphics


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Revised: March 02, 2008