A Radiation Hardened Nano-power 8Mb SRAM in 130nm CMOS

Mark Lysinger1,  Francois Jacquet2,  David Mcclure1,  Philippe Roche2,  Mehdi Zamanian1,  Naren Sahoo1,  John Russell1
1STMicroelectronics, Carrollton, USA, 2STMicroelectronics, Crolles, France


An eight megabit Rad Hard SRAM, implemented in 130nm CMOS technology, uses stacked capacitors within the memory cell for robustness, supply power gating and internally developed array power supplies to achieve very low soft error rates and standby current consumption under 600nA.