Processor Verification with hwBugHunt

Sangeetha Sudhakrishnan and Jose Renau
University of California, Santa Cruz


Functional verification of modern processors and complex ASIC designs is a challenging task. Verification is frequently more complex than the design itself. The time required to find the exact source of an error in complex designs represents a significant part of the verification process. Most test suites only report the existence of a bug, but are unable to ultimately discover the line of HDL code where the bug is located. Designing new tools and techniques that reduce these overheads is very important to keep the verification costs under control. This paper proposes a novel HDL error-discovery tool (hwBugHunt) to pinpoint the line of code where a bug is located. hwBugHunt works by instrumenting Verilog code and gathering statistics during the execution of various testbenches. The proposed infrastructure is tested on an Alpha-like 21264 Verilog implementation. Our evaluation shows that hwBugHunt pinpoints 62% of the bugs introduced on IVM, and it does so with a low overhead and high accuracy.