Sponsored by Synopsys
Tuesday March 17
3rd Annual ISQED Quality Award (IQ Award 2009)
Sponsored by Mentor Graphic
ISQED09 Best Paper Awards
Sponsored by Magma Design Automation, and Synopsys
ISQED Committee Awards
Tuesday, March 17
Improving Design Quality by Managing Process Variability
Vice President of Engineering, Synopsys, Inc.
Strained silicon technologies introduced in advanced process nodes provide a boost in transistor performance and enable continued CMOS scaling. As a tradeoff, however, the stress sources used in strained silicon technologies give rise to stress proximity effects that cause variations in transistor performance. Process variability, which includes lithographic and stress proximity effects, has an increasing impact on design quality at 45nm and below. To improve design quality, process variability needs to be managed at the design phase since these proximity effects are layout dependent. In this presentation, we will discuss the sources of process variability, their impact on design layouts, and how to manage process variability to improve design quality.
About Terry Ma
Terry serves as Vice President of Engineering of the Technology CAD Business Unit at Synopsys. He joined Synopsys in 2005, and currently leads the TCAD R&D and Consulting & Engineering teams. Terry has over 20 years of experience in the semiconductor industry and held various management and engineering positions at Cadence, Technology Modeling Associates/Avant!, Applied Materials, and Philips Research Labs. Terry received his Bachelorís degree in Chemical Engineering from University of California at Berkeley and his Master of Business Administration from Northwestern Universityís Kellogg School of Management.