Soft Error Rate Determination for Nanoscale Sequential Logic

Fan Wang1 and Vishwani Agrawal2
1Juniper Netwrok, Inc., 2Auburn University


We analyze the neutron induced soft error rate (SER) by modeling the induced pulse with two parameters, an occurrence frequency and a probability density function for the pulse width. We extend the analysis to sequential logic and latches and calculate failures in time (FIT) rates. The analysis is developed for the available background neutron flux data, which is experimentally determined. This, along with the device characteristics, gives the induced pulse parameters. A gate-level algorithm propagates the pulse parameters through logic gates. This algorithm correctly models the logic masking of error pulses. We introduce the concept of latching window to model the temporal masking by sequential elements. Finally, an algorithm for analyzing SER of sequential logic is presented.