Quality-driven Methodology for Demanding Accelerator Design

Lech Jóźwiak and Yahya Jan
Eindhoven University of Technology


This paper focuses on mastering the architecture development for demanding hardware accelerators. It presents the results of our analysis of the main problems that have to be solved when designing accelerators for modern demanding applications, and illustrates the problems with an example of accelerator design for LDPC decoders for the newest communication system standards. This analysis demonstrates among others that the today’s high-level synthesis is not sufficient to adequately support the complex accelerator design process for the modern demanding applications. Based on the results of our analysis, we formulate the main requirements that have to be satisfied by an adequate methodology for demanding accelerator design, and propose an architecture design methodology which satisfies the requirements.