Integrated Hierarchical Synthesis of Analog/RF Circuits with Accurate Performance Mapping

Kuo-Hsuan Meng1,  Po-Cheng Pan2,  Hung-Ming Chen2
1UIUC, USA, 2NCTU, Taiwan


This work presents a synthesis framework for nanometer analog, mixed-signal, and radio-frequency circuit design. Our approach has both the advantages of accuracy and efficiency, accomplished by integrating both circuit simulator and analytic formulation. Through performance space exploration, this work facilitates optimal specification setting and trade-off aspect identification from nanometer technology nodes. The hierarchical global-to-local search process consists of device characterization, mapping from geometry-biasing parameters through circuit-level parameters to performance metrics, and reverse identification of optimal design varaibles with fine-tuning. The nature of hierarchy enables the capability of synthesizing large-scaled design with guarantee of accurate and fast convergence to the global optimum. Also this framework can be utilized to identify the constraints that are critically strict to the overall performance, such that the circuit can be designed to operate close to its limit. A radio-frequency distributed amplifier is synthesized as the demonstration showing that the proposed framework is effective and efficient.