Analysis of TSV-to-TSV Coupling with High-Impedance Termination in 3D ICs

Taigon Song1,  Chang Liu1,  Dae Hyun Kim1,  Jonghyun Cho2,  Joohee Kim2,  Jun So Pak2,  Seungyoung Ahn2,  Joungho Kim2,  Kihyun Yoon3,  Sung Kyu Lim1
1Georgia Tech ECE, 2KAIST EE, 3Silicon Image


It is widely-known that coupling exists between adjacent through-silicon vias (TSVs) in 3D ICs. Since this TSV-to-TSV coupling is not negligible, it is highly likely that TSV-to-TSV coupling affects crosstalk significantly. Although a few works have already analyzed coupling in 3D ICs, they used S-parameter-based methods under the assumption that all ports in their simulation structures are under 50 ohm termination conditions. However, this 50 ohm termination condition does not occur at ports (pins) of gates inside a 3D IC. In this paper, therefore, we analyze TSV-to-TSV coupling in 3D ICs based on a lumped circuit model with a realistic high-impedance termination condition. We also analyze how channel affect TSV-to-TSV coupling differently in different frequency ranges. Based on our results, we propose several techniques to reduce TSV-to-TSV coupling in 3D ICs.