Quasi-Planar Tri-gate (QPT) Bulk CMOS Technology for Single-Port SRAM Application

Yasumasa Tsukamoto1,  Makoto Yabuuchi1,  Hidehiro Fujiwara1,  Koji Nii1,  Changhwan Shin2,  Tsu-Jae King Liu3
1Renesas Electronics Corporation, 2University of Soeul, 3University of California at Berkeley


For ease of manufacture, three-dimensional Quasi-Planar Tri-gate (QPT) Bulk MOSFETs are fabricated by simply slightly recessing the shallow trench isolation (STI) oxide prior to gate-stack formation. In a cost-effective way, 7% higher performance with lower leakage current in QPT bulk devices (vs. planar bulk devices) is demonstrated with better scalability for sub-45nm technology nodes. QPT-based single-port SRAM characteristics can be improved with the help of circuit techniques (i.e., read- and write-assist circuitry) which make it possible to compensate for the imbalanced improvement of n-/p-type QPT SRAM devices.