A novel digital calibration technique based on component redundancy and random diversity (CRRD) is used to enable robust high-gain positive-feedback (PF) amplifiers. Gain enhancement is achieved through output conductance cancellation which requires accurate calibration across process, voltage, and temperature. CRRD employs a set of redundant elements intentionally exhibiting high local variability, and the subset of the elements that best cancel amplifier’s output conductance is employed. We develop a novel design methodology to rigorously predict: (1) how to partition the full configuration range between a fixed load and a tunable load, and (2) how, for a given partition, to size the tunable load elements. We prove that having a sizable coarse load is essential for reaching optimality. We apply the developed theory to the design of a 0.18μm CMOS test-chip implementing an array of CRRD-based PF amplifiers. We demonstrate that CRRD allows only linear increase of the array size, and its associated capacitance, with dB gain improvement, in contrast to exponential increase in earlier designs. Gains of ninety amplifiers were measured and exceeded 64dB for 95% of the samples, up from an intrinsic gain of 28.5dB. A gain-bandwidth product of 186MHz was measured while consuming 65μA from a 1.8V supply.