Analysis of Very Large Resistive Networks Using Low Distortion Embedding

Sandeep Koranne
Mentor Graphics Corporation


VLSI designs contain very large resistive networks consisting of hundreds of millions (10e11) of resistors. Accurate parasitic extraction and analysis of such large networks is essential in many phases of the VLSI design flow. Existing techniques to analyze large resistive networks using linear solvers, despite recent optimizations, still take prohibitive computation time. In this paper a new technique based on low-distortion embedding to calculate point-to-point effective resistance is presented. Our proposed method employs recently discovered techniques from theoretical computer science to compute an $\epsilon$-approximate resistance embedding matrix from which effective resistances of all node pairs can be calculated as easily as taking the Euclidean norm of column differences. The proposed method runs in almost linear time (linear in the number of resistors), and the accuracy ($\epsilon$) is user specified. The method has been implemented and experimental results on large networks arising from power grid analysis containing upto 10e11 nodes are presented. Compared to existing method using sparse linear solvers, our methods are more than 10 times faster on mesh networks and more importantly given a network of $n$ nodes, allow computation of effective resistance between arbitrary node pairs in $O(\lg(n))$ time ($\lg$ denotes logarithm to base 2).