We present a novel and highly automated technique for dynamic system level power management of System-on-a-Chip (SoC) designs. We present a formal system to represent power constraints and power intent as rules. We also present a Term Rewriting Systems based rule rewriting engine as our dynamic power manager. We provide a notion of formal correctness of our rule engine execution and provide a robust algorithm to dynamically and automatically manage power consumption in large SoC designs.
There are two fundamental building blocks at the core of our technique. First, we present a powerful formal system to capture power constraints and power intent as rules. This is a self checking system and will automatically flag conflicting constraints or rules. Next, we present a rewriting strategy for managing power constraint rules using a formal deductive logic technique specially honed for dynamic power management of SoC designs. Together, this provides a common platform and representation to seamlessly cooperate between hardware and software constraints to achieve maximum platform power optimization dynamically during execution.
We demonstrate our technique in multiple contexts on an SoC design of the state-of-the-art next generation Intel smartphone platform.