Increasing the Security Level of Analog IPs by Using a Dedicated Vulnerability Analysis Methodology

Noemie Beringuier-Boher1,  David Hely2,  Vincent Beroulle2,  Joel Damiens3,  Philippe Candelier3
1Grenoble-INP LCIS and STMicroelectronics, 2Grenoble-INP LCIS, 3STMicroelectronics


With the increasing diffusion of multi-purpose systems such as smart phones and set-top boxes, security requirements are becoming as important as power consumption and silicon area constraints in SoCs and ASICs conception. In the same time, the complexity of IPs and the new technology nodes make the security evaluation more difficult. Indeed, predicting how a circuit behaves when pushed beyond its specifications limits is now a harder task. While security concerns in software development and digital hardware design are very well known, analog hardware security issues are not really studied. This paper first introduces the security concerns for analog and mixed circuits and then presents a vulnerability analysis methodology dedicated to them. Using this methodology, the security level of AMS SoC and Analog IP is increased by evaluating objectively its vulnerabilities and designing countermeasure in the earliest design steps.