CMOS Digital signal processing hardware are power efficient but consume large area, whereas, analog processing units, based on CMOS technology are compact, but power hungry. Emerging magneto-metallic spin-torque devices like domain wall magnets can however perform analog-mode computation like summation and thresholding at ultra low voltage. Such devices can be exploited in designing spin-CMOS hybrid analog processing units that are compact as well as low power. In this work we present a mixed-mode signal processing scheme employing “domain wall neurons” that involves energy efficient analog-mode computation upon digital data. Simulation results for 8-bit, 16-tap FIR filter show that such a design can achieve 10x lower power consumption and 16x lower area as compared to an optimized digital CMOS design at the same technology node. In such a design area saving can be traded off for enhanced power savings, depending upon the target application.