Diagnosis of Small Delay Defects Arising Due to Manufacturing Imperfections using Path Delay Measurements

Ahish Mysore Somashekar and Spyros Tragoudas


A boolean satisfiability based approach capable of identifying the location of embedded segments with small delay defects, arising due to process variations, is proposed. Furthermore, a novel algorithmic framework is presented to derive swift solutions for the generated conjunctive normal form. To our knowledge, this is the first approach which guarantees that one of the solutions describes the actual defective configurations. Experimental analysis on ISCAS and ITC benchmark suites show that the proposed approach is highly scalable and identifies the location of multiple delay defects.