A Compact Realization of a Quantum n-Bit Square Root Circuit

Nusrat Jahan lisa1 and Hafiz Md. Hasan Babu2
1Ahsanullah University of Science and Technology, Dhaka, Bangladesh, 2University of Dhaka, Bangladesh


In this paper, we propose an n-bit quantum square root circuit, where n is the number of output bits. The proposed design of the n-bit quantum square root circuit shows that it is composed of quantum adder/subtractor circuit named QAS circuit. We present a quantum adder/subtractor circuit using HNG quantum circuit and CNOT gates. Finally, we show an algorithm to construct a compact n-bit quantum square root circuit. A new technique to calculate the quantum gate complexity of quantum circuits has also been proposed in the paper. Our circuit performs better than the existing ones in terms of quantum gates, delays, quantum gate calculation complexity, area and power, e.g., the proposed 128-bit quantum square root circuit improves 57.20% on the number of quantum gates, 62.48% on delay and 57.20% on area and power with respect to the existing circuit. We also simulate the proposed quantum square root using Microwind DSCH 2.7 which shows the functional correctness of the circuit.