Experimental validation of minimum operating-voltage-estimation for low supply voltage circuits

Takashi Sato1,  Junya Kawashima1,  Hiroshi Tsutsui2,  Hiroyuki Ochi3
1Kyoto University, 2Hokkaido University, 3Ritsumeikan University


Abstract

Sub- and near-threshold circuits have been attracting vast interests because of their effectiveness for low power and low energy circuits. In designing these circuits, the estimation of the minimum operating voltage (VDDmin), under which the circuit does not function correctly, is one of the most important issues. In this paper, through simulations and measurements, the distribution of VDDmin is explored. Log-normal model approximation and a quick VDDmin estimation method are validated by the measurement of 127k FFs. Assuming that the VDDmin of a circuit is dominated by the VDDminof the FFs, the distribution of the larger circuit is efficiently estimated. The measurements of 192 DCT circuits show that the estima tion matches measurement very well within 10mV error.