Methodology to Optimize Critical Node Seperation in Hardened Flip-Flops

Sandeep Shambhulingaiah,  Srivatsan Chellappa,  Sushil Kumar,  Lawrence Clark
Arizona State University


Radiation Hardening is a requirement for microelectronic circuits used in aerospace applications as they are prone to radiation induced upsets from high altitude neutrons and ions. The most common method to harden VLSI circuits is to use hardened flip-flops (FFs). The design of these FFs is made more difficult with increasing multi-node charge collection (MNCC) in advanced scaled fabrication processes, which requires that charge storage and other sensitive nodes be separated so that one impinging radiation particle does not affect redundant nodes simultaneously. In this paper we describe a correct by construction design methodology to determine a-priori which hardened FF nodes must be separated, as well as a general interleaving scheme to achieve this separation. We apply the methodology to radiation hardened flip-flops and demonstrate optimal circuit physical organization for protection against multi-node charge collection.