Exponentially rising costs of retooling foundries and manufacturing process technology development forced many semiconductor companies to go fabless. Design, manufacturing, packaging and testing by separate companies reduce risks for individual companies through diversification, and reduces cost but creates a supply chain problem where IC designers have little control over the rest of the production chain. This makes their designs vulnerable to theft via overproduction by untrusted foundries. Various techniques like split manufacturing and hardware metering have been proposed to address the problem. They offer varying degrees of protection but require fundamental reengineering of the supply chain. In this work, we present a design flow and architecture for preventing hardware design piracy via customizing the hardware instruction set for each chip ensuring protection. An important aspect of this solution is that the customization is performed by the IC designer without upending the standard operation of the existing supply chain. We describe a design architecture based on Physically Unclonable functions for such secure customization. The results on benchmark codes demonstrate the feasibility of the system with minimal performance and hardware overheads.