An Efficient Timing Analysis Model for 6T FinFET SRAM using Current-Based Method

Tiansong Cui1, Ji Li1, Alireza Shafaei Bejestan1, Shahin Nazarian1, Massoud Pedram2
1University of Southern California, 2USC


This paper presents an efficient Current Source Model (CSM) to calculate the read/write delay of FinFET 6T SRAM cells accounting for noisy waveform at each voltage node.