emperature is one of the major sources of delay variability which may cause timing violations. In this paper, a novel design method of temperature dependent intentional skew for temperature dependent signal delays in order to improve the performances (clock frequency, available temperature range, etc.) of a circuit against temperature dependent delay variability. Our approach is based on a constraint graph which consists of two subgraphs and edges for bridging these two subgraphs; one subgraph for representing constraints at a specified low-end temperature, another subgraph for constraints at a high-end temperature, and bridging edges for constraining skew values at both end temperatures depending on temperature dependency of intentional skews themselves. Our approach can handle the mixture of various intentional skews and signal delays with different temperature-related parameters, which is the most significant advantage of our approach.