Ordered escape routing (OER) is an important research topic in PCB design, which means the wires need to be routed in a given order at the boundary of pin array. Although OER has been widely investigated, most works assume the routing capacity between two adjacent pins is just 1. In this paper, we focus on multi-capacity OER (MC-OER), which means multiple wires are allowed to pass through between two adjacent pins. We first analyze the limitation of existing model based on min-cost multi-commodity flow graph, i.e. MMCF model, and point out the reason why it cannot support multi-capacity. Based on the MMCF model, a multi-capacity multi-commodity flow (MC-MCF) model is proposed for the MC-OER problem. To accelerate the solution based on MC-MCF model, a wiring resource driven partition strategy is further proposed which results in an accelerated MC-MCF algorithm for the MC-OER problem with objective of minimizing wiring length. Experiments on various grid pin array cases (with up to 308 pins) show that the proposed method achieves 100% routability within reasonable time. And, it performs similarly well or better than existing methods when solving single-capacity OER problem.