Intrinsic Parameter Fluctuation and Process Variation Effect of Vertically Stacked Silicon Nanosheet Complementary Field-Effect Transistors

Sekhar Kola, Yiming Li, Min-Hui Chuang
National Yang Ming Chiao Tung University


We explore the major fluctuation sources in vertically stacked gate-all-around silicon nanosheet (GAA Si NS) complementary field-effect transistors (CFETs). The process variation effect (PVE), work function fluctuation (WKF) and random dopant fluctuation (RDF) of CFET are statistically analyzed by using an experimentally validated device simulation technique. Among them, both WKF and RDF are suppressed benefited from the superior channel control and increased effective gate area. However, the PVE on both N-/P-FETs of GAA Si CFET possesses the largest off-state current fluctuations of 80% and 278% because device characteristic is sensitive to the layer thickness and width.