Field programmable gate arrays (FPGAs) are widely used in critical applications such as industrial, medical, automotive, and military systems due to their ability to be dynamically reconfigured at runtime. However, this reconfigurability also presents security concerns, as FPGA designs are encoded in a bitstream that adversaries can target for design cloning, IP theft, or hardware Trojan insertion. This work presents a proof-of-concept for detecting hardware Trojans (HT) in FPGA using an unsupervised machine-learning method that eliminates the need for reference models of HT. The proposed method is based on transforming the configuration bitstream into an encoded vector, bypassing the need for netlist reconstruction and allowing for HT detection based solely on the extracted FPGA layout information. Our method was evaluated against various HT attack scenarios and accurately detected all infected bitstreams.