System-on-chip security architectures are the traditional route of providing security assurance across all application domains. Architects use such security architectures based on the application of the SoC, and not all SoCs are subjected to all kinds of security vulnerabilities. However, the linking factor across all SoCs is their exposure to supply chain vulnerabilities. Globalization of the semiconductor supply chain has exposed modern SoCs to a wide variety of possible attacks such as overproduction, counterfeiting, reverse engineering, etc. Although there have been multiple security architectures proposed, these have been primarily based on a microcontroller-based design, which incurs significant overheads in terms of area and power. Because almost all SoCs are subjected to supply chain vulnerabilities, a security architecture that provides security against the most prevalent supply chain attacks and, at the same time, incurs minimal overhead is a fundamental and important requirement. In this paper, we present SOCRATES, a minimum security architecture that provides security against such attacks. SOCRATES is a viable candidate, especially for low-power and area designs. We elaborate on what requirements entail the design of such a minimum security architecture, the complexities, and challenges involved, and how SOCRATES overcomes those challenges. Based on our experimental results on area and power consumption on multiple ASIC nodes, SOCRATES is indeed a viable architecture for enforcing the minimum security standards with minimal overheads.