Power estimation is crucial in VLSI design, enabling early evaluation of energy efficiency. Traditional gate-level simulation-based methods offer higher accuracy but are time-consuming, while RTL simulation-based methods are faster but less precise. Recently, machine learning-based methods have emerged as a promising solution, achieving a balance between speed and accuracy. This paper presents a GNN-based framework for gate-level average power estimation, comprising two key steps: (1) signal activity prediction and (2) average power calculation. The first step improves upon an existing GNN-based switching activity predictor by integrating more circuit information and refining feature representations, leading to significant accuracy gains. The predicted signal activities are then formatted as a Switching Activity Interchange Format file, which is used by a commercial power analysis tool to compute the average total power, including dynamic and static contributions. Experimental results demonstrate that our signal activity prediction achieves an RMSE of 0.02461 on ISCAS'85 benchmarks with random patterns, a 0.05960 improvement over prior work, and 0.02568 on industrial designs with real patterns. Furthermore, our average power estimation achieves errors of 1.66% on ISCAS'85 benchmarks with random patterns and 9.81% on industry designs with real patterns.