Multi-level cell non-volatile memories store multiple bits per cell, offering higher density compared to single-level designs. Beyond efficiency, the expanded state space of MLCs has been recently explored for hardware-level security, particularly through physically unclonable functions that utilize the inherent process variations in the chip production flow. In this work, we extend the security use cases of MLC devices by proposing a method for obfuscating neural network weights stored in external memory. As modern AI accelerators often rely on off-chip storage, models become vulnerable to extraction by adversaries with physical or privileged access. We introduce a multi-level-cell-assisted encoding scheme that transforms weight representations into obfuscated forms tied to on-chip reconstruction logic. This design imposes negligible inference overhead while elevating resistance to model-stealing attacks. Our approach provides a lightweight and hardware-integrated protection mechanism without requiring changes to the NN architecture or training pipeline.