ISQED05

Tuesday March 22, 2005

Session 3A

San Carlos Room

3:15pm - 5:15pm

 

Functional Verification and Test Generation

 

Chairs:    Daniela De Venuto, Politecnico di Bari, Italy

George Alexiou, University of Patras and Computer Technology Institute, Greece

 

3:15pm

Introduction

 

3:20pm

3A.1       

Combining System Level Modeling with Assertion Based Verification

Anat Dahan*, Daniel Geis*t, Leonid Gluhovsky*, Dmitry Pidan*, Gil Shapir*, Yaron Wolfsthal*, Lyes Benalycherif**, Romain Kamdem**, Younes Lahbib**, *IBM Haifa Research Lab, Haifa Israel, **STMicroelectronics, Grenoble, France

 

3:50pm

3A.2       

Low Voltage Test In Place of Fast Clock in DDSI Delay Test

Haihua Yan, Gefu Xu, Adit D. Singh, Auburn University

 

4:20pm

3A.3       

Functional Verification of Networked Embedded Systems

Nicola Bombieri, Franco Fummi, Graziano Pravadelli

 

4:50pm

3A.4

Functions for Quality Transition Fault Tests

Maria K. Michael*, Stelios Neophytou*, Spyros Tragoudas**, *University of Cyprus, **Southern Illinois University, Carbondale  

 


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