Session 6B

San Juan Room

1:00pm - 3:05pm

Design Approaches for System in Package (SiP)

Chairs:    Lalitha Immaneni, Intel

Ravi Mahajan, Intel

1:00pm

Introduction

1:05pm

6B.1       

Exploring the challenges in creating a high-quality mainstream design solution for System-in-Package (SiP) design (Invited)

Tom Whipple, Cadence Design Systems

1:35pm

6B.2       

Design and Analysis of Area-IO DRAM/Logic integration with System-in-a-Package

Anru Wang, Wayne Dai, University of California at Santa Cruz

2:05pm

6B.3       

Physical Design of Optoelectronic System-On-A-Package: A Cad Tool and Algorithms

Chung-Seok(Andy) Seo, Abhijit Chatterjee, Nan M. Jokerst

2:35pm

6B.4       

Concurrent Chip Package Design for Global Clock Distribution Using Standing Wave Approach

Meigen Shen, Li-Rong Zheng, Hannu Tenhunen