International Symposium on Quality Electronic Design (ISQED)

ISQED 2011 Lunch Tutorial


Wednesday March 16, 2011

Sponsored by Mentor Graphics

Room: Wincheter/Stevens Creek


Signoff-driven Custom Physical Design



Rich Morse - Technical Marketing Manager, SpringSoft

Joseph C. Davis - Calibre Interface Marketing Manager, Mentor Graphics

Richard Rouse - Distinguished Engineer , MoSys


Custom designers are the first to face the challenges of implementing circuits in each new technology. This means that they have to implement advanced, differentiated, and robust designs while the technology is still evolving. They face new device behaviors, lithography and CMP effects, and the quickly growing range of design rules. This session will highlight the new challenges of analog physical design and introduce a new solution to bring signoff-quality physical verification into the custom design environment to improve design time and quality.

Rich Morse Rich Morse
Technical Marketing Manager

About Rich Morse

Rich Morse is a Technical Marketing and EDA Alliances Manager for the Physical Design Product Group at SpringSoft. He has extensive experience in managing mask data prep organizations at Cirrus Logic and Jazz Semiconductor, and more recently in EDA in the areas of DFM and Custom IC Design.







Joe Davis Joseph C. Davis
Calibre Interface Marketing Manager
Mentor Graphics

About Joe Davis

Joe Davis' career in the IC industry spans over 20 years at high-profile companies such as Analog Devices, Texas Instruments and PDF Solutions. He has worked on both sides of the EDA relationship, both designing ICs, and developing tools for IC designers and manufacturers. He is now Mentor's Product Manager for Calibre interactive and integration products where he applies his expertise in data visualization and engineering workflow. Prior to joining Mentor Joe was the senior product manager for yield simulation products at PDF Solutions where he managed semiconductor process-design technologies and services, including yield simulation and analysis tools. Joe enjoys sailing, gardening, hiking and living and working in new places and cultures, having built teams on three different continents. Joe earned his BSEE, MSEE and Ph.D. in Electrical and Computer Engineering from North Carolina State University.

Richard Rouse Richard Rouse
Distinguished Engineer

About Richard Rouse

At MoSys, Richard is responsible for EDA and process technologies for high speed SerDes designs and manages the tape-out signoff for the Bandwidth EngineĀ® family of IC products. He has developed transistors at the leading edge process nodes for several IDM's and was a principle technologist at Clear Shape Technologies. Richard received his Ph.D. in physics from Stony Brook University, has numerous technical publications, and holds more than ten semiconductor and EDA patents.