ISQED 2026: Program (Rev. 1 - 2/8/26)


SESSION 1A

Wednesday April 8

Emerging transistors and circuits

Chair: Rasit Topaloglu, Adeia

52    10:15AM
1A.1
Inter-Pixel Binary Edge-Detection (IPBED) Array
Md Rahatul Islam Udoy1, Md Mazharul Islam2, Garrett Rose1, Ahmedullah Aziz1
1University of Tennessee, Knoxville, 2The University of Tennessee

137    10:35AM
1A.2
Fault Tolerant Design of IGZO-based Binary Search ADCs
Paula Lozano Duarte1, Sule Ozev2, Mehdi Tahoori1
1Karlsruhe Institute of Technology, 2ASU

105    10:55AM
1A.3
Thermal-Aware Compact Modeling and Design-Space Exploration of δ-Doped β-Ga2O3 MOSFETs for RF Power Electronics
Habibullah Khan, Nabasindhu Das, Nidhin Kurian Kalarickal, Kexin Li
Arizona State University

139    11:15AM
1A.4
Temperature-Dependent Current–Voltage Model for Emerging GAA NS FETs Using a Physics-Inspired Neural Network
Yiming Li, Yun Tai, Min-Hui Chuang
National Yang Ming Chiao Tung University

144    11:35AM
1A.5
Pioneering the Use of Response Surface Modeling for Complementary Field-Effect Transistors Design and Optimization
Yu-Wen Xu and Yiming Li
National Yang Ming Chiao Tung University


SESSION 1B

Wednesday April 8

Foundations of Cryptographic Hardware Security

Chair: Sergiu Mosanu, University of Virginia

77    10:15AM
1B.1
OK-BMM: A Power-Performance-Efficient Overlap-Free Karatsuba Based Barrett Modular Multiplier for Secure Embedded Systems
Bhavana S1, Keerthana B2, Madhav Rao3
1International Institute of Information Technology, Bangalore, 2International Institute of Information Technology Bangalore, 3International Institute of Information Technology-Bangalore

147    10:35AM
1B.2
R-BMM: A Reconfigurable Barrett Modular Multiplier Architecture for High-Performance Cryptographic Systems
Keerthana B1, Bhavana S2, Madhav Rao3
1International Institute of Information Technology Bangalore, 2International Institute of Information Technology, Bangalore, 3International Institute of Information Technology-Bangalore

92    10:55AM
1B.3
A Low-overhead Dilithium-NTT Architecture using Accelerated K-RED Modular Reduction Unit
Harsh Gupta1, Aryan Goyal1, Paranjay Dhadwal1, Jugal Gandhi2, Diksha Shekhawat3, Jai Gopal Pandey4
1Birla Institute of Technology and Science (BITS) Pilani Goa Campus, 2AcSIR at CSIR-CEERI, 3AcSIR, CSIR-CEERI, 4CSIR -Central Electronics Engineering Research Institute (CEERI), Pilani, Rajasthan, India

196    11:15AM
1B.4
STREAMLOCK: Stream Cipher-Enabled Cryptographic Logic Locking
Nahush Tambe1, DHRUVAKUMAR AKLEKAR2, Naseeruddin Lodge2, Vineet Chadalavada3, fareena saqib2
1University f North Carolina at Charlotte, 2UNIVERSITY OF NORTH CAROLINA AT CHARLOTTE, 3UNC Charlotte

128    11:35AM
1B.5
Hardware-Efficient Compound IC Protection with Lightweight Cryptography
Levent Aksoy1, Muhammad Munir1, Sedat Akleylek2
1Tallinn University of Technology, 2University of Tartu


SESSION 1C

Wednesday April 8

From Specifications to Silicon: Advanced Verification Across the Hardware Stack

Chair: Chidhambaranathan Rajamanikkam, Synopsys
Co-Chair: Sushant Sadangi, Intel

14    10:15AM
1C.1
Specification-Driven INL Generation for Behavioral ADC Models with Controlled Error Injection
Thorben Schey1, Khaled Karoonlatifi2, Michael Weyrich1, Andrey Morozov1
1University of Stuttgart, 2Advantest Europe GmbH

11    10:35AM
1C.2
Verifying Hardware Resource Isolation Using Mandatory Access Control
Christopher Nokes1, Kostas Amberiadis2, D. Richard Kuhn3, Edwards Reed4, Michael Zuzak1
1Rochester Institute of Technology, 2National Institute of Standards and Technology, 3Virginia Tech, 4AESEC Global Services, Inc.

177    10:55AM
1C.3
Scalable Hardware–Software Co-Verification through Linux Driver Reuse: Methodology Validated on USB4 and xHCI Host Controllers.
Suchir Gupta, Amit Sharma, Suneetha Suryadevara, Vishnuvardhan mandala
Synopsys

21    11:15AM
1C.4
Cutwidth Decomposition on Circuit-AIGs: Taming Verification Complexity of Arithmetic Circuits
Luca Müller1, Mohamed Nadeem2, Rolf Drechsler1
1University of Bremen/DFKI, 2University of Bremen


SESSION 2A

Wednesday April 8

AI and Machine Learning in Hardware Design

Chair: Sergiu Mosanu, University of Virginia

4    1:40PM
2A.1
BPINN-EM-Post: Bayesian Physics-Informed Neural Network based Stochastic Electromigration Damage Analysis in the Post-void Phase
Subed Lamichhane1, Haotian Lu1, Sheldon Tan2
1University of California, Riverside, 2University of California at Riverside

18    2:00PM
2A.2
AutoBeaVer: Automating Behavioral Modeling and Verification in Library Characterization with LLM Agents
Tianze Wu1, Jian Xin2, Yuan Wang2, Xuliang Yu1, Xunzhao Yin1, Qianqian Yang1, Zuochang Ye2, Liang Zhao1
1Zhejiang University, 2Tsinghua University

22    2:20PM
2A.3
An AI-Enhanced STA Framework Supporting CCS and SI with Signoff Accuracy
Chao Yan
Hexin

134    2:40PM
2A.4
Integrating Automatic Prompt Engineering and Vision-Language Model for Pad Defect Classification
Yi-Ting Shen1, Yan-Hsiu Liu2, Yi-Ting Li1, Wuqian Tang1, Yung-Chih Chen3, Hao-Chiang Shao4, Chia-Wen Lin1, Chun-Yao Wang1
1National Tsing Hua University, 2United Microelectronics Corporation, 3National Taiwan University of Science and Technology, 4National Chung Hsing University

194    3:00PM
2A.5
Accelerating Post-Quantum Cryptography via LLM-Driven Hardware-Software Co-Design
Yuchao Liao, Tosiron Adegbija, Roman Lysecky
University of Arizona


SESSION 2B

Wednesday April 8

Detection, Validation, and Reverse Engineering of Malicious Hardware

Chair: Hassan Salmani, Howard University

78    1:40PM
2B.1
Reference-Free EM Validation Flow for Detecting Triggered Hardware Trojans
Mahsa Tahghigh and Hassan Salmani
Howard University

79    2:00PM
2B.2
Reliable Hardware Trojan Detection for RISC-V Processors using Formal Verification and Automation
Czea Sie Chuah1, Christian Appold2, Tim Leinmüller2
1Technical University of Munich, 2DENSO AUTOMOTIVE Deutschland GmbH

148    2:20PM
2B.3
BERT-HIT: A Transformer-Based Approach for Hardware Trojan Detection in Gate-Level Netlists
Lizi Zhang1, Navid Tehrani1, Azadeh Davoodi2, Rasit Onur Topaloglu3
1University of Wisconsin, Madison, 2University of Wisconsin - Madison, 3Adeia

145    2:40PM
2B.4
Reverse Engineering RTL Models from DSP Slices in FPGA Netlists
Avinash Hegde Kota1, Aparajithan Nathamuni-Venkatesan2, Ranga Vemuri3, John Emmert2
1Digital Design Environments Lab, Dept. of ECE, University of Cincinnati, 2University of Cincinnati, 3Univ of Cincinnati

131    3:00PM
2B.5
Security-Aware Printed-Circuit-Board Routing Based on Deep Reinforcement Learning
Katherine Shu-Min Li1, Ching-Han Lai1, Fang-Chi Wu1, Sying-Jyan Wang2
1National Sun Yat-sen University, 2National Chung Hsing University


SESSION 2C

Wednesday April 8

AI & Machine Learning Acceleration – Architectures and Co-Design

Chair: Banafsheh Saber Latibari, University of Arizona

7    1:40PM
2C.1
Carbon Emission-Based Sustainability Model For Photonic Neural Network Accelerators
Siqin Liu1, Avinash Karanth1, Ahmed Louri2
1Ohio University, 2George Washington University

38    2:00PM
2C.2
FlexGO: A Unified Overlay for General Graph Neural Network Acceleration
Pramath Balisavira, Rishov Sarkar, Cong Hao
Georgia Institute of Technology

44    2:20PM
2C.3
Bhasha-Rupantarika: Algorithm-Hardware Co-design approach for Multi-lingual Neural Machine Translation
Mukul Lokhande1, Tanushree Dewangan1, Sharik Mansoori2, Tejas Chaudhari3, Akarsh J.1, Damayanti Lokhande4, Adam Teman5, Santosh Vishvakarma6
1Indian Institute of Technology Indore, 2Undergraduate, 3Indian Institute of Technology, Indore, 4Independent, 5Bar-Ilan University, 6IIT Indore

58    2:40PM
2C.4
TinyQL: A Quantum Machine Learning Framework at Edge for Resource-Constrained IoT Devices
Maurice Ngouen, Mohammad Rahman, Alexander Perez-Pons, Nagarajan Prabakar
Florida International University

167    3:00PM
2C.5
Hardware Software Co-Optimization for RISC-V Based High-Performance Hyperdimensional Computing Architectures
Priyanka Agarwal1, Arun M2, Chandan N S3, Shrinidhi Rao2, Madhav Rao2
1IIIT Bangalore, 2International Institute of Information Technology-Bangalore, 3International Institute of Information Technology Bangalore


SESSION PW1

Thursday April 9

Short Presentation & WIP Session 1

Chair: Hossein Sayadi, California State University, Long Beach

166    9:40AM
PW1.1
Sparsity Aware Pre-processing for Systolic Array Dataflow Acceleration
Tadikonda Venkata Sai Chaitanya1, Bhargav D V2, Madhav Rao2
1International Insititute of Information Technology-Bangalore, 2International Institute of Information Technology-Bangalore

59    9:45AM
PW1.2
Cascaded Reservoir Computing for Temporal Sensor Data: Integrating Physical Dynamics with Echo State Networks
Md Razuan Hossain1, Imran Fahad2, Braylen Robinson2, Sai Swaminathan2, Hritom Das3
1Utah Valley University, 2The University of Tennessee, Knoxville, 3Oklahoma State University

175    9:50AM
PW1.3
NeuroMap: A Scalable Toolchain for Mapping Memristor-based Spiking Neural Networks
Zhewei Wang, Ye Yue, Mansour Rezaei, Caleb Mcalpine, Ismail Tirtom, Savas Kaya, Avinash Karanth
Ohio University

30    9:55AM
PW1.4
VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair
Haomin Qi, Yuyang Du, Lihao Zhang, Soung Chang Liew, Kexin Chen, Yining Du
The Chinese University of Hong Kong

9    10:00AM
PW1.5
Semantic-Guided Test Generation using Fine-Tuned LLMs for Validation of Hardware Accelerators
Emma Andrews1, Aruna Jayasena2, Prabhat Mishra1
1University of Florida, 2University of Tennessee

34    10:05AM
PW1.6
TCAD-Based GGNMOS Digital-Twin for ESD Characterization & Sensitivity Analysis
Kunaal Pulli1, Mehrdad Nourani2, Charvaka Duvvury3
1University of Texas at Dallas, 2The University of Texas at Dallas, 3iT2 Technologies

53    10:10AM
PW1.7
HDL-DFGen: A Digital Filter Hardware Description Generation Framework
Pedro Pereira1, Sergio Bampi2, Eduardo Costa2
1Universidade Federal do Rio Grande do Sul, 2UFRGS - Federal Univ. of Rio Grande do Sul

61    10:15AM
PW1.8
Automatic Compact Model Parameter Extraction with an Enhanced Hybrid of Differential Evolution and Nelder-Mead Optimizers
Fahad Usmani1, Zijian Song2, Roberto Tinti2
1Keysight Technologies, 2Engineer

89    10:20AM
PW1.9
AutoSim: A Declarative Framework for Simulator-Agnostic Hardware Verification Automation
Bhagirath K, Dheeraj Pant, Abhishek Tiwari, Vivek Khaneja
Centre for Development of Advanced Computing


SESSION PW2

Thursday April 9

Short Presentation & WIP Session 2

Chair: Farah Ferdaus, Lamar University

170    9:40AM
PW2.1
FSMVision: Semantic Extraction of Finite State Machines from Diagrams via Multimodal AI
Sagor Chandro Bakchy1, Muhammad Aminul Islam2, Sazadur Rahman3, Md Tauhidur Rahman1
1Florida International University, 2University of New Haven, 3University of Central Florida

111    9:45AM
PW2.2
Multi-Die Concurrent Global Placement with Macro Flipping-aware Wirelength Modelfor 3D-ICs
Anh Phan1, Cheng-Xun Song1, Sheng-Tan Huang2, Shao-Yun Fang1, Tung-Chieh Chen3, Kai-Shun Hu3, Chin-Fang Shen3
1National Taiwan University Of Science and Technology, 2m11207418@mail.ntust.edu.tw, 3Synopsys Taiwan Co., Ltd.,

45    9:50AM
PW2.3
Modeling Endurance Degradation of VCM-based 1T1R ReRAM Cell for Circuit Simulations
Supriya Chakraborty1, Seyed Hossein Hashemi Shadmehri2, Thiago Copetti2, Tobias Gemmeke2, Leticia Poehls3
1RWTH Aachen University, 2RWTH Aachen University, 3IHP - Leibniz Institute for High Performance Microelectronics, Frankfurt (Oder), Germany

60    9:55AM
PW2.4
Monolithic 3D Integration for Null Convention Logic (NCL)-Based Asynchronous Circuits
Xiameng Zhang1, Ashiq Sakib2, Kushal Ponugoti3, Madhava Sarma Vemuri1
1University of Washington Bothell, 2Southern Illinois University Edwardsville, 3North Dakota State University

107    10:00AM
PW2.5
Data Augmentation Strategies for Machine Learning-based Compact Modeling of Emerging Devices
Diego Ferrer1, Md Mazharul Islam2, Wei Pan3, Juan Mendez Granado3, Denis Mamaluy3, Ahmedullah Aziz4
1The University of Tennessee, Knoxville, 2The University of Tennessee, 3Sandia National Laboratory, 4University of Tennessee, Knoxville

87    10:05AM
PW2.6
A Compact Gray-Code Quantum Read-only Memory for the NISQ Era
Hao Yu Lu1, Yu-Ting Kao2, Yeong-Jar Chang2, Chao-Hung Wang1, Darsen Lu1
1National Cheng Kung University, 2Industrial Technology Research Institute

100    10:10AM
PW2.7
Trusted Memory Access Monitoring (TMAM): Detecting Fine-Grained DDR4 Access Patterns in FPGA Clouds
Vineet Chadalavada1, Nahush Tambe1, Naseeruddin Lodge1, Dhurva Aklekar1, fareena saqib2
1UNC Charlotte, 2University of North Carolina at Charlotte

132    10:15AM
PW2.8
Unsupervised Learning Based Hardware Trojan Detection Method for RTL Designs
Sying-Jyan Wang1, Hou-Cheng Chen1, Katherine Shu-Min Li2
1National Chung Hsing University, 2National Sun Yat-sen University

28    10:20AM
PW2.9
Reusing Assertion Properties as Hardware Checkers: Implementation and their Software and Hardware Recovery
Czea Sie Chuah1, Christian Appold2, Tim Leinmueller2
1Technical University of Munich, 2DENSO AUTOMOTIVE Deutschland GmbH


SESSION PW3

Thursday April 9

Short Presentation & WIP Session 3

Chair: Sergiu Mosanu, University of Virginia

68    9:40AM
PW3.1
Detecting Hardware Trojans in Quantum Circuits Based on CodeBERT model
Min-Chao Huang1, Chin-Wei Tien2, Sy-Yen Kuo1
1National Taiwan University, 2Trend Micro

130    9:45AM
PW3.2
Unsupervised Detection of Ring-Oscillator Hardware Trojans via Autoencoder Power Analysis
Oyshi Sarker1 and Jaya Dofe2
1California State University Fullerton, 2California State University

141    9:50AM
PW3.3
Characterizing On-Chip Variability of Anderson PUFs Across Multiple FPGAs
Quoc Huy Lieu1 and Jaya Dofe2
1California State University Fullerton, 2California State University

5    9:55AM
PW3.4
TrackGNN: A Highly Parallelized and Self-Adaptive GNN Accelerator for Track Reconstruction on FPGAs
Shuyang Li1, Hanqing Zhang2, Ruiqi Chen3, Bruno da Silva3, Giorgian Borca-Tasciuc4, Dantong Yu5, Cong Hao1
1Georgia Institute of Technology, 2Zhejiang University, 3Vrije Universiteit Brussel, 4Rensselaer Polytechnic Institute, 5New Jersey Institute of Technology

36    10:00AM
PW3.5
Enhanced Hybrid Temporal Computing Using Deterministic Summations for Ultra-Low-Power Accelerators
Sachin Sachdeva1, Jincong Lu1, Wantong Li1, Sheldon Tan2
1University of California, Riverside, 2University of California at Riverside

162    10:05AM
PW3.6
POSEIDON: A Posit-Optimized Out-of-Order Processor with Transformer Acceleration for Edge Devices
Niranjan Gopal1, Madhav Rao2, Harshvardhan Mishra3, Gaurav Nayak4
1International Institute of Information Technology Bangalore, 2International Institute of Information Technology-Bangalore, 3IIIT-B, 4IIITB

179    10:10AM
PW3.7
Real-Time Edge Semantics for Drone Swarms via FPGA Perception and On-Device LLMs
Zhaoqi Wang, Wade Fortney, Peter Forcha, Yu Feng, Gabriel Bendix, Christophe Bobda
University of Florida

188    10:15AM
PW3.8
RACFlow: An Evolutionary Framework for Compact Reconfigurable Approximate Circuits
Bhargav D V and Madhav Rao
International Institute of Information Technology-Bangalore

1    10:20AM
PW3.9
Active Interposers for High Bandwidth Memory
Andres Ayes and Eby Friedman
University of Rochester


SESSION 3A

Thursday April 9

Advanced Circuit Modeling and Analysis

Chair: Rouwaida Kanj, Synopsys/American University of Beirut

19    10:45AM
3A.1
Effective Capacitance Modeling Using Graph Neural Networks
Eren Dogan and Matthew Guthaus
University of California, Santa Cruz

124    11:05AM
3A.2
Gate-Level Average Power Estimation from RTL Activity with Graph Neural Network
Ssu-Chen Chang1, Yung-Chih Chen2, Chun-Yao Wang3, Jian-Meng Yang4, Pei-Ying Liu5
1National Taiwan University of Science and Technology, 2National Taiwan University of Science and Technology; Arculus System Co. Ltd., 3Dept. CS, National Tsing Hua University, 4Arculus System, 5MicroIP

129    11:25AM
3A.3
Multi-Node Timing and Power Estimation with Adapter-Based Transfer Learning
Luis Humberto Pena Trevino1, Eric Guerra Ribeiro2, Lirida Naviner1, Fady Abouzeid2, Philippe Roche2
1Télécom Paris, 2STMicroelectronics

160    11:45AM
3A.4
Efficient High-Sigma Yield Analysis based on Deep Ensemble Framework with Active learing and Augmentation
Younghun Park, Kang Hun Kim, Jun Seo Jung, Juho Kim
Sogang University

185    12:05PM
3A.5
Parasitics-Aware Framework for Integrated OTA Sizing and Layout Synthesis in FinFET Technologies
Endalk Gebru, Subhadip Ghosh, Ramesh Harjani, Sachin S. Sapatnekar
University of Minnesota


SESSION 3B

Thursday April 9

NN Acceleration & Dataflow Optimization

Chair: Rasit Topaloglu, Adeia

10    10:45AM
3B.1
Accelerating Machine Learning Applications through Optimized Tensor Decompositions
Emma Andrews and Prabhat Mishra
University of Florida

39    11:05AM
3B.2
Harmony: A Hardware-Mapping Co-Exploration Framework for Hybrid CIM-based Vision Transformer Accelerator
Yihang Zuo1, Zexin Fu2, Cong Wang3, Yuchao Wu4, Jiayi Huang2, Yuzhe Ma2
1Arizona State University, 2The Hong Kong University of Science and Technology (Guangzhou), 3The Hong Kong University of Science and Technology(Guangzhou), 4The Hong Kong University of Science and Technology

126    11:25AM
3B.3
BiKA: Kolmogorov-Arnold-Network-inspired Ultra Lightweight Neural Network Hardware Accelerator
Yuhao Liu1, Salim Ullah2, Akash Kumar1
1Ruhr University Bochum, 2Ruhr-Universität Bochum

152    11:45AM
3B.4
Cross-Layer Co-Optimized LSTM Accelerator for Real-Time Gait Analysis
Mohammad Hasan Ahmadilivani1, Levent Aksoy2, Mohammad Eslami3, Alar Kuusik2, Jaan Raik2
1Tallinn University of Tehnology, 2Tallinn University of Technology, 3Department of Computer Systems, Tallinn University of Technology

156    12:05PM
3B.5
Mixed-Precision Booth Factored Systolic Array Design for Accelerating Neural Networks
Sneha Dandekar1, Bhavana S2, Madhav Rao3
1International Institute of Information Technology - Bangalore, 2International Institute of Information Technology, Bangalore, 3International Institute of Information Technology-Bangalore


SESSION 3C

Thursday April 9

Security for AI and AI for Security

Chair: Ahmedullah Aziz, The University of Tennessee, Knoxville

212    10:45AM
3C.1
Cross-Layer Security Through Multi-Level Cell Memories from Hardware Obfuscation to AI Model Protection
Miran Tobar1, Hassan Nassar2, Joerg Henkel3
1Karlsruhe Institute of Technology, 2Karlsruher Institut für Technologie, 3KIT

213    11:05AM
3C.2
Is Mamba Reliable for Medical Imaging?
Banafsheh Saber Latibari1, Najmeh Nazari2, Daniel Brignac1, Hossein Sayadi3, Houman Homayoun4, Abhijit Mahalanobis1
1University of Arizona, 2UC Davis, 3California State University Long Baech, 4University of California Davis

214    11:25AM
3C.3
Leaking at the Edge: EM Side-Channel Input Recovery on Edge TPU
Simon Pankner, Dennis Gnad, Vincent Meyers, Mehdi Tahoori
Karlsruhe Institute of Technology (KIT)

215    11:45AM
3C.4
Evolving Landscape of Attacks on AI Hardware and Robust Defenses
Habibur Rahaman, Sudipta Paria, SWARUP BHUNIA
University of Florida

219    12:05PM
3C.5
Fine-Grained Patching via Contention Balancer: A Practical Mitigation Strategy for Spectre Vulnerabilities Using SpecScope Contention Maps
Najmeh Nazari1, Banafsheh Saber Latibari2, Behnam Omidi3, Hosein Mohammadi Makrani1, Fatemeh Movafagh4, Seyede Elahe Hosseini Imeni5, Chongzhou Fang6, Khaled khasawneh3, Houman Homayoun1, Hossein Sayadi7
1UC Davis, 2University of Arizona, 3George Mason University, 4Simon Fraser University, 5University of California Davis, 6Rochester Institute of Technology, 7California State University, Long Beach


SESSION 4A

Thursday April 9

Innovative Design Methodologies and Frameworks

Chair: Jay Dholakia, AMD

65    2:10PM
4A.1
A Reconfigurable Framework for AI-FPGA Agent Integration and Acceleration
Aybars Yunusoglu1, Talha Coskun2, Hiruna Vishwamith3, Murat Isik4, I. Can Dikmen5
1Purdue University, 2University of Illinois Urbana-Champaign, 3University of Moratuwa, 4Stanford University, 5Istinye University

94    2:30PM
4A.2
Design for Manufacturing and Assembly for Heterogeneous Integration using Micro-Transfer Printing
Robert Fischbach1, Ronny Frevert2, Andreas Krinke1, Sebastian Wicht3, Jens Lienig1
1Dresden University of Technology, 2X-FAB Dresden GmbH & Co. KG, 3X-FAB Semiconductor Foundries

125    2:50PM
4A.3
GRPO with State Mutations: Improving LLM-Based Hardware Test Plan Generation
Dimple Kochar1, Nathaniel Pinckney2, Guan-Ting Liu3, Chia-tung Ho4, Chenhui Deng4, Haoxing Ren2, Brucek Khailany4
1Massachusetts Institute of Technology, 2NVIDIA Corporation, 3NVIDIA Research, 4Nvidia

146    3:10PM
4A.4
Thor: Towards General Directed Circuit Graph Encoder with Sample-Efficient Graph Contrastive Learning
Wencheng Zou1, Yiran Xia2, Haoyu Wang3, Pan Li3, Nan Wu1
1George Washington University, 2Hong Kong University of Science and Technology, 3Georgia Institute of Technology

138    3:30PM
4A.5
Area-Oriented Threshold Logic Circuit Synthesis Using Negative Weights
Yu-Chuan Yen1, Fu-Cheng Cai1, Yi-Ting Li1, Wuqian Tang1, Yung-Chih Chen2, Ihao Chen3, Chun-Yao Wang1
1National Tsing Hua University, 2National Taiwan University of Science and Technology, 3Incentia Design Systems Inc.


SESSION 4B

Thursday April 9

Fault, Memory, and Physical Attacks on Hardware Systems

Chair: Rouwaida Kanj, Synopsys/American University of Beirut

103    2:10PM
4B.1
Descrambling the Scrambler: Experimental Extraction of Data Scrambling Keys in COTS NAND Flash
Matchima Buddhanoy1, Habib Ur Rahman1, Aleksandar Milenkovic2, Sudeep Pasricha1, Biswajit Ray1
1Colorado State University, 2The University of Alabama in Huntsville

80    2:30PM
4B.2
Characterization of the Stability of DRAM Read Disturbances
Roberto Capoferri1, Alessandro Barenghi2, Luca Breveglieri1, Khalil Gammoh3, Niccolò Izzo3, Gerardo Pelosi1
1Politecnico di Milano, 2Politecnico di Milano - DEIB, 3Micron

48    2:50PM
4B.3
Power-Off Laser Attack Against Bulk Built-in Current Sensors
Raphael Viera, Noé Backert, Jean-Max Dutertre
Mines Saint-Etienne

164    3:10PM
4B.4
An Efficient Memory Cell Flipping Technique Under Covert Channel Attacks
Prokash Ghosh1, Sundeep Agrawal1, Sonali Dulange1, Subhajit Dutta Chowdhury2
1AMD Inc, USA, 2AMD

192    3:30PM
4B.5
CRISP: Platform-Agnostic Unified Reconfigurable Hardware Security Primitive
Atri Chatterjee, Sudipta Paria, Aritra Dasgupta, Habibur Rahaman, Baibhab Chatterjee, SWARUP BHUNIA
University of Florida


SESSION 4C

Thursday April 9

Neuromorphic Computing

Chair: Harsh Patel, Microsoft

204    2:10PM
4C.1
Enabling Lightweight and Efficient Edge Inference for Identifying Radio Modulation
Kang Jun Bai1 and Michelle Jiang2
1Air Force Research Laboratory, 2Carnegie Mellon University

210    2:30PM
4C.2
Robustness Analysis of Neuromorphic Embodied AI Robot for Associative Learning against Adversarial Stickers
Tianze Liu1, Kang Jun Bai2, Hongyu An1
1Michigan Technological University, 2Air Force Research Laboratory

211    2:50PM
4C.3
Heterogeneous Compute-in-Memory Fabrics for Efficient, Scalable Edge Inference and Learning
Luqi Zheng, Zeshu Wang, Shuting Du, Mufeng Chen, Amir Massah Bavani, Haitong Li
Purdue University

202    3:10PM
4C.4
S-OPTQ: Rapid Quantization for Spiking Vision Transformers
Zaidao Mei
Syracuse University

218    3:30PM
4C.5
Agentic AI for Chip Design Verification: Failure Modes, Metrics, and Coverage Closure
Noah Marosok1, Marcus Halm2, Kevin Immanuel Gubbi2, Mohammadnavid Tarighat2, Neusha Javidnia3, Soheil Zibakhsh-Shabgahi1, Ke Huang4, Setareh Rafatirad5, Hossein Sayadi6, Farinaz Koushanfar7, Houman Homayoun5
1University of California, San Diego, 2University of California, Davis, 3UC San Diego, 4San Diego State University, 5University of California Davis, 6California State University, Long Beach, 7University of California San Diego


SESSION 5A

Friday April 10

Quantum and memory technology and circuits

Chair: Rasit Topaloglu, Adeia

17    8:40AM
5A.1
Delay Register Minimization in RSFQ Circuits
Chi-En Hsu and Wai-Kei Mak
Department of Computer Science, National Tsing Hua University

161    9:00AM
5A.2
The Art of Optimizing T-Depth for Quantum Error Correction in Large-Scale Quantum Computing
Avimita Chatterjee1, Archisman Ghosh2, Swaroop Ghosh1
1Pennsylvania State University, 2The Pennsylvania State University

84    9:20AM
5A.3
ULTRARAM: An Emerging Memory Platform for NVM and Low-Power Neuromorphic Systems
Abhishek Kumar1, Musaibh Farooq Dar2, Peter D. Hodgson3, Dominic Lane3, Peter J. Carrington3, Evangelia Delli3, Richard Beanland4, Shruti Mehrotra5, James Ashforth-Pook6, Manus Hayne3, Avirup Dasgupta2
1University of California Berkeley, 2Indian Institute of Technology Roorkee, 3Lancaster University, 4Warwick University, 5GlobalFoundries, 6QuInAs Technology Limited

180    9:40AM
5A.4
RRAM Crossbar Design with AC Driving for Parallel Computing-In-Memory
Guanyu Chi1, Ing-Chao Lin2, Ulf Schlichtmann1
1Technical University of Munich, 2National Yang Ming Chiao Tung University

191    10:00AM
5A.5
Design and Simulation of Long-Retention Capacitorless 1T-DRAM Using Experimentally Calibrated Process and Device Simulations
Shao-Han Cheng1, Chun-Hung Wang1, Fu-Chang Hsu2, Yao-Jen Lee1, Yiming Li1
1National Yang Ming Chiao Tung University, 2NEO Semiconductor Inc.


SESSION 5B

Friday April 10

Memory Systems, Approximate Computing, and System-Level Optimization

Chair: Farah Ferdaus, Lamar University

8    8:40AM
5B.1
Multi-Level Cell Memory Driven Efficient Cache Organization
Binu Christopher1, Rwicheek Sarker1, Vivek Bhasi2, Sumitha George1
1North Dakota State University, 2The Pennsylvania State University

43    9:00AM
5B.2
PEARL: Page Migration for Efficient Hybrid Memory Systems using Adaptive and Lightweight Reinforcement Learning
Jash Vipul Ratanghayra, Aswathy N S, Hemangee Kapoor
Indian Institute of Technology Guwahati

75    9:20AM
5B.3
Bit-Flexible Systolic Architecture: Optimizing Processing Elements with Application-Specific Floating-Point Truncation
Dantu Nandini Devi1 and Madhav Rao2
1International Institute of Information Technology Bangalore, 2International Institute of Information Technology-Bangalore

90    9:40AM
5B.4
VAE-Enabled Design Space Exploration for Heterogeneous Approximate Matrix Multiplication Accelerators
Niranjan Gopal1, Nishith Akula2, Madhav Rao3
1International Institute of Information Technology Bangalore, 2International Institute of Information Technology, Bangalore, 3International Institute of Information Technology-Bangalore

122    10:00AM
5B.5
Crossing the Layers and Dotting the Details: Systematic Exploration of Near-Memory Computing
Riselda Kodra1, Rafael Medina Morillas2, Marina Zapater3, Giovanni Ansaloni1, David Atienza4
1EPFL, 2ETH Zurich, 3University of Applied Sciences Western Switzerland (HES-SO), 4École Polytechnique Fédérale de Lausanne (EPFL)


SESSION 5C

Friday April 10

Neuromorphic and Approximate Computing Hardware for Next-Generation AI

Chair: Harsh Patel, Microsoft

150    8:40AM
5C.1
BM-HPR Mul: Error Tolerant Hardware Efficient Booth Modified High Precision Redundant Multiplier
Chandan N S1, Yerasi Manoj Reddy1, Madhav Rao2
1International Institute of Information Technology Bangalore, 2International Institute of Information Technology-Bangalore

99    9:00AM
5C.2
A Low-Power Analog Spiking Neural Network with On-Chip Learning
Kiruthikan Sithamparanathan and Jeffery Dix
University of Arkansas

76    9:20AM
5C.3
Hardware-Efficient and Precision-Aware FP16 Approximate Multipliers: A Probabilistic Approach
Bindu G Gowda1 and Madhav Rao2
1International Institute of Information Technology, Bangalore, 2International Institute of Information Technology-Bangalore

98    9:40AM
5C.4
A 4 Transistor eDRAM-Based Content Addressable Memory
Kayode Adebunmi1 and Akhilesh Jaiswal2
1University of Wisconsin Madison, 2University of Wisconsin-Madison

217    10:00AM
5C.5
Design Space Exploration of Soft-Error-Tolerant SRAMs for Compute-in-Memory Accelerators
Jinane Bazzi1, Rachid Jamil2, Hicham Masri2, Ahmad Alayan2, Rouwaida Kanj3, Mohammed Fouda4, Ahmed Eltawil1
1King Abdullah University of Science and Technology, 2AUB, 3Synopsys, 4Rain Neuromorphics Inc.


SESSION 6A

Friday April 10

Timing and Placement Optimization Techniques

Chair: Chidhambaranathan Rajamanikkam, Synopsys

23    10:30AM
6A.1
Timing-Aware Placement Algorithm for Rapid Single-Flux-Quantum Circuits
Zhaoting Zhang, Pengming Chen, Zepeng Li, Genggeng Liu
Fuzhou University

32    10:50AM
6A.2
Hybrid GCN-CNN Framework for Fast Timing-driven Layer Assignment in Global Routing
Sai Harika Julakanti and Vidya A. Chhabria
Arizona State University

121    11:10AM
6A.3
Cost-Effective Co-Optimization of SoC Partitioning and Chiplet-Level Global Placement for 2.5D Integration
Chou-Yen-Chih Li1, Chih-Yu Li1, Yung-Chih Chen2, Liang-Chia Cheng3
1National Taiwan University of Science and Technology, 2National Taiwan University of Science and Technology; Arculus System Co. Ltd., 3Industrial Technology Research Institute

136    11:30AM
6A.4
Advanced Techniques for NP3-Boolean Matching: Leveraging Multi-bit Ports and Reverse Engineering to Minimize Search Space
Kai-Po Hsu1, Yi-Ting Li1, Fu-Cheng Cai2, Chia-Feng Chien1, Wuqian Tang2, Ting-Yu Ku1, Yu-Chen Cheng1, Tsung-Han Lai1, Cheng-Lung Wang1, Yi-Ting Shen1, Kuan-Ling Chou1, Zi-Wei Huang1, Tao-Chun Huang1, Tzu-Li Hsu1, Yung-Chih Chen3, Shih-Chieh Chang1, Ting-Chi Wang1, TingTing Hwang1, Chun-Yao Wang1
1National Tsing Hua University, 2National Tsing Hua Univer, 3National Taiwan University of Science and Technology

163    11:50AM
6A.5
VHDLBench — a Dataset with Rich Contextual Relationships for Training Custom LLMs
Arpit Sakhreliya and Manoj Franklin
University of Maryland, College park


SESSION 6B

Friday April 10

Security and Robustness of Machine Learning Hardware

Chair: Amin Rezaei, California State University, Long Beach

157    10:30AM
6B.1
Tiny Changes, Big Drops: Unveiling Security Vulnerabilities in ML Accelerators
Filip Grimsholm1, Cassandra Westergren1, Mahdi Fazeli1, Ahmad Patooghy2
1Halmstad University, 2North Carolina A&T State University

109    10:50AM
6B.2
GBFA: Gradual Bit-Flip Fault Attack on Graph Neural Network Accelerators
Sanaz Kazemi and Sai Manoj Pudukotai Dinakarrao
George Mason University

123    11:10AM
6B.3
Ralts: Robust Aggregation for Enhancing Graph Neural Network Resilience on Bit-flip Errors
Wencheng Zou and Nan Wu
George Washington University

104    11:30AM
6B.4
A Data-Free Membership Inference Attack on Federated Learning in Hardware Assurance
Gijung Lee1, Wavid Bowman1, Olivia Dizon-Paradis1, Reiner Dizon-Paradis1, Ronald Wilson2, Damon Woodard2, Domenic Forte2
1Florida Institute for National Security, University of Florida, 2University of Florida

35    11:50AM
6B.5
Confidential and Efficient Implementation of Lightweight Large Language Models
Hui Feng, Ben Dong, Qian Wang
University of California, Merced


SESSION 6C

Friday April 10

Emerging AI workloads on NPUs

Chair: Shamik Kundu, Intel


SESSION 7A

Friday April 10

Hyperdimensional, Neuromorphic, and Robust Cognitive Computing Hardware

Chair: Rouwaida Kanj, Synopsys/American University of Beirut

29    12:55PM
7A.1
A Mixed-Signal Neuromorphic Accelerator for Energy Efficient Inference in Event-Based Neural Network Models
Armin Abdollahi1, Mehdi Kamal1, Massoud Pedram2
1University of Southern California, 2USC

81    1:15PM
7A.2
Training Once, Deploy Anywhere: Defect-Robust Memristor Accelerators without Re-Training
Rejina Maharjan and Chao Lu
Southern Illinois University Carbondale

106    1:35PM
7A.3
RouteHD: A Routing-Aware FPGA Accelerator for HDC Classification
Abdullah Sahruri, Alaaddin Goktug Ayar, Sercan Aygun, Martin Margala
University of Louisiana at Lafayette

193    1:55PM
7A.4
Multi-Stage Compression of Machine Learning Models
Nahyeon Kim and Prabhat Mishra
University of Florida

199    2:15PM
7A.5
Early Class Exclusion in Hyperdimensional Computing
Rémy Duboucheix1, Mohsen Asghari1, Sébastien Le Beux1, Otmane Ait Mohamed1, Ron Mankarious2
1Concordia University, 2PolarSat Inc.


SESSION 7B

Friday April 10

System-Level and Supply-Chain Security for Trusted Computing

Chair: Banafsheh Saber Latibari, University of Arizona

71    12:55PM
7B.1
Security-Quality Scorecard: A Comprehensive Framework for Quantitative Evaluation of Quantitative Evaluation of Hardware-Enforced Boot Chain Security
Hyunmin Kim
TII

97    1:15PM
7B.2
Proteus: A Morpheus II Extension for System-Level Moving-Target Defense and Key-Exposure Hardening
Jeremy Knickerbocker1, Syed Rafay Hasan2, Amr Hilal1, Mohammad Ashiqur Rahman3
1Tennessee Tech University, 2Tennessee Tech Univesity, 3Florida International University

172    1:35PM
7B.3
A System-Level Design-Space Exploration of Security for Systems-on-Chip
Abigail Butka, Antonio Hendricks, Christophe Bobda
University of Florida

13    1:55PM
7B.4
DUA: Detection of Unrecognized Applications Using One-Class SVM in NoC-Based SoCs
Andrea Galimberti1, Katsuaki Nakano2, Rohan Purkait2, Amlan Ganguly2, Michael Zuzak2, Mark Indovina2, Sai Pudukotai Dinakarrao3, William Fornaciari1, Davide Zoni1
1Politecnico di Milano, 2Rochester Institute of Technology, 3George Mason University

159    2:15PM
7B.5
Shadow Integrity Control (sic)
Amirreza Hashemi1, Hans Liljestrand2, Carlos Chinea Perez3, Jan-Erik Ekberg3
1Huawei Technologies/Aalto University, 2Huawei Technologies, Finland, 3Huawei Technologies


SESSION 7C

Friday April 10

EdgeAI and Applications

Chair: Soheil Salehi, University of Arizona

205    12:55PM
7C.1
MOTION: ML-Assisted On-Device Low-Latency Motion Recognition
veeramani pugazhenthi1, Wei-hsiang Chu2, Junwei Lu2, Jadyn Miyahira2, Mahdi Eslamimehr3, Pratik Satam1, Rozhin Yasaei1, Soheil Salehi4
1university of arizona, 2University of California, 3Quandary Peak Research, 4Department of Electrical and Computer Engineering, University of Arizona

206    1:15PM
7C.2
Lightweight Heart Rate Variability Estimation Using PPG Signals
Ben Brown and Chongzhou Fang
Rochester Institute of Technology

207    1:35PM
7C.3
A Rapid Pipeline for Training and Deploying ML Models on WeBe Band
Edwin Kay1, Asmita Asmita1, Houman Homayoun1, Mahdi Eslamimehr2
1UC Davis, 2Quandary Peak Research

208    1:55PM
7C.4
Scalable Security Monitoring on Chiplet-Based Systems
Pooya Aghanoury1, Sneha Swaroopa1, Dao Xian Ding1, Farshad Firouzi2, Nader Sehatbakhsh1
1UCLA, 2ASU

209    2:15PM
7C.5
Edge AI-based Anomaly Behavior Analysis for Industrial Control Systems
Zhanglong Yang1, Qinxuan Shi1, Yu-Zheng Lin2, Soheil Salehi3, Pratik Satam2, Sicong Shao1
1University of North Dakota, 2University of Arizona, 3Department of Electrical and Computer Engineering, University of Arizona

216   
Closing the Loop: Overcoming the Tool-Feedback Gap in Agentic Hardware Design
Mohammadnavid Tarighat1, Kevin Immanuel Gubbi1, Neusha Javidnia2, Noah Marosok2, Soheil Zibakhsh-shabgahi2, Marcus Halm3, Mahdi Pirayesh Shirazi Nejad3, Setareh Rafatirad4, Farinaz Koushanfar5, Houman Homayoun4
1University of California, Davis, 2Department of Electrical and Computer Engineering, University of California San Diego, La Jolla, CA 92093, 3Department of Electrical and Computer Engineering, University of California Davis, Davis, CA 95616, 4University of California Davis, 5University of California San Diego